3D-IC Signal Integrity: From Silicon Interposers To System Signoff

T2Covered by 1 source · first reported by Semiconductor Engineering / SemiWiki / EE Times / EE Journal / Electronics Weekly at 04 Nov, 08:02 UTC

A unified, system-level environment that aggregates several proven technologies into a seamless workflow spanning architecture exploration, electromagnetic extraction, channel simulation, protocol compliance verification, and final system-level signoff. The post 3D-IC Signal Integrity: From Silicon…

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Sources

• T23D-IC Signal Integrity: From Silicon Interposers To System SignoffSemiconductor Engineering / SemiWiki / EE Times / EE Journal / Electronics Weekly04 Nov, 08:02