ML-Based Power Models for CPUs. Innovation in Verification

T2Covered by 1 source · first reported by Semiconductor Engineering / SemiWiki / EE Times / EE Journal / Electronics Weekly at 29 Oct, 13:00 UTC

An effective learned power model for a CPU could be a significant advantage in early estimation of power performance against realistic workloads in complex architectures. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer…

hardware

Sources

• T2ML-Based Power Models for CPUs. Innovation in VerificationSemiconductor Engineering / SemiWiki / EE Times / EE Journal / Electronics Weekly29 Oct, 13:00