Beyond The EPE Budget: Building The Next Generation Of Computational Lithography

T2Covered by 1 source · first reported by Semiconductor Engineering / SemiWiki / EE Times / EE Journal / Electronics Weekly at 22 Oct, 07:08 UTC

Why better models, richer metrology, explainable AI, and cross-industry collaboration must come together to extend semiconductor scaling. The post Beyond The EPE Budget: Building The Next Generation Of Computational Lithography appeared first on Semiconductor Engineering.

hardware

Sources

• T2Beyond The EPE Budget: Building The Next Generation Of Computational LithographySemiconductor Engineering / SemiWiki / EE Times / EE Journal / Electronics Weekly22 Oct, 07:08